The present invention relates to technique for correcting the image quality of an image display apparatus such as a field emission display (hereinafter abbreviated to FED).
An FED includes electron sources which are disposed at intersections of a plurality of scanning lines extending in the horizontal direction and a plurality of signal lines extending in the vertical direction and each of which is driven by a scanning voltage applied through the scanning line and a drive voltage applied through the signal line (in accordance with an image signal).
In such an FED, a voltage drop is produced by a wiring resistance of the scanning line, so that deterioration in the image quality such as nonuniformity of brightness is produced. As conventional techniques for correcting the deterioration in the image quality, techniques described in, for example, JP-A-7-325554 and JP-A-8-248921 are known. JP-A-325554 discloses a scanning line control circuit for applying a scanning voltage and connected to both of right and left ends of the scanning lines to be operated alternately for each scanning line or each frame, so that apparent nonuniformity of brightness is reduced. JP-A-8-248921 discloses that a correction signal having a level conformable to a wiring resistance in each electron source is added to a brightness signal to correct nonuniformity of brightness.
The scanning line control circuit applies the scanning voltage to each scanning line successively so as to select the plurality of scanning lines arranged in the vertical direction successively one by one (occasionally two by two). The scanning voltage is produced by switching a non-selection potential (0 V, for example) and a selection potential (−5 or 5 V, for example) by a switch circuit disposed in the scanning line control circuit. In other words, the switch circuit makes the switching operation so that the non-selection potential (0 V) is applied to the non-selected scanning line and the selection potential (−5 or 5 V) is applied to the selected scanning line.
The switch circuit has as relatively large an internal resistance as about 10 to 20 Ω when it is composed of, for example, an analog circuit and the internal resistance occupies a large percentage in the internal resistance of the scanning line control circuit. Since the internal resistance of the switch circuit is a resistance to a current flowing through all electron sources of one line, uniform voltage drops are produced in the respective electron sources of the selected line (when levels of the image signals for the selected line are equal in each horizontal position). In other words, the internal resistance of the switch circuit is a factor causing reduction of the brightness which is one of deterioration in the image quality and it is difficult to reproduce the brightness expressed by an original image signal sufficiently. For example, even when an image signal having the brightness of 100% is to be displayed, the image signal having the brightness of, for example, only 95% can be displayed due to the voltage drop produced by the internal resistance.
Accordingly, in order to attain the higher image quality in the FED, it is important to compensate the voltage drops produced by not only the wiring resistance of the scanning line but also the internal resistance of the switch circuit so that the reduction of brightness is lowered or suppressed. However, both of JP-A-7-325554 and JP-A-8-248921 take account of only the voltage drop produced by the wiring resistance of the scanning line but do not take account of the voltage drop produced by the internal resistance of the switch circuit, so that the reduced brightness cannot be compensated suitably.